Machine Learning for IC Yield: Models, SHAP Explainability & APC/R2R

A 3-day, hands-on program to turn fab/process data into higher wafer yield using leakage-safe ML, explainability (SHAP), and R2R/APC. Build and evaluate predictors, prototype virtual metrology, and leave with an actionable, data-backed yield-improvement plan.

Enable participants to convert fab data into measurable yield gains using leakage-safe ML, explainability, and R2R/APC.

• Learn IC yield fundamentals and baseline analytics.

• Apply leakage-safe ML for yield prediction.

• Gain hands-on experience in feature engineering and model evaluation.

• Optimize processes using R2R/APC and virtual metrology.

• Interpret yield drivers and develop improvement plans.

• Understand MLOps, real-time monitoring, and deployment in fabs.

• PhD scholars & PG students in microelectronics/VLSI/materials/data science

• Academicians & researchers in semiconductor manufacturing or ML

• Fab professionals: process/yield/device/test/metrology/equipment engineers, DFM/PDK, MES/IT, quality/OEE

• Data scientists/ML engineers supporting fab analytics, VM, or APC/R2R

• Build and evaluate ML models for yield prediction.

• Apply SPC, Pareto, and classical models for yield analysis.

• Optimize processes using R2R/APC and virtual metrology.

• Implement feature engineering and time-series models.

• Interpret yield drivers using SHAP and permutation importance.

• Develop actionable yield-improvement plans.

• Gain insights into MLOps and best practices for fab data.